@Kepler_L2 has revealed brand new information about AMD’s RDNA 3 flagship GPU, the Navi 31, which brings up to 384MB of unlimited cache in both the standard and 3D V-Cache versions of the package. This information is specific to AMD’s RDNA 3 flagship, the Navi 31 chip. So far, we don’t have any information about the top chip, which is only known as Navi 3x, so Navi 31 should retain its flagship status when it launches this year and could be replaced by a faster variant next year.
On that note, the AMD Navi 31 GPU is confirmed to feature an advanced chip packaging design with next-generation Infinity Cache. Based on @Kepler_L2 digging through AMD’s drivers for various patches and logs, it looks like the Navi 31 GPU will have as many as 6 MCDs (Multi-Cache Chips).
Each MCD is said to have up to 32MB of standard cache, and will also be available in 3D V-Cache form. This brings the standard cache to at least 256MB, while the variant with 3D V-Cache can reach 384MB Infinity Cache. Infinity Cache is also 32MB in size, half the size of the Zen 3 3D V-Cache part (64MB), but with six MCDs available, the chip could theoretically provide an additional 256MB of Infinity Cache via 3D package to provide an additional 256MB of Infinity Cache, but it looks like only half of the MCDs will be integrated onto them via 3D stacking. Thus, 256MB is standard plus 128MB of 3D V-Cache, for a total of 384MB of Infinity Cache.
This is a 3X increase over AMD’s RDNA 2 flagship Navi 21, which has only 128 MB of total Infinity Cache. The Infinity Cache architecture helps AMD pump more bandwidth to the GPU, which allows it to eliminate memory bottlenecks and provide fast caching close to the GPU, rather than through VRAM.
AMD Navi 31 GPU, the flagship RDNA 3 chip will power next-generation enthusiast cards such as the Radeon RX 7900 XT graphics card. We’ve heard that AMD is dropping the CU (compute unit) in favor of the WGP (workgroup processor) on its next-generation RDNA 3 GPU. Each WGP will house dual CUs (compute units), but with twice as many SIMD32 clusters, compared to the RDNA 2’s 2 clusters per CU.
According to the latest information, the AMD Navi 31 GPU with the RDNA 3 architecture is expected to offer a single graphics computing chip with 48 WGPs, 12 SAs and 6 SEs. This will provide a total of 12,288 stream processors, which is lower than the previous number. This will also reduce overall computing performance unless AMD goes crazy with clock frequencies over 3.0GHz on its flagship part. Navi 31 GPU will also carry 6 graphics compute chips that will have 32MB Infinity Cache each and may also carry a 64-bit (32-bit x 2) memory controller that will provide a 384-bit bus interface to the chips.
As for clock speeds, AMD Navi 31 GPUs are said to be capable of clock speeds of 3 GHz and beyond. rival Nvidia’s flagship GPUs also offer clock speeds close to 2.8 GHz, but AMD has had a significant advantage over Nvidia in clock speeds over the past generation, so this is all expected to continue. 3 GHz clock speeds mean we can expect the latest flagship product with FP32 performance in excess of 75 TFLOPs, which would be a 2.3x increase over the current RDNA 2 flagship, the RX 6950 XT.
Of course, this will bring higher power consumption, and AMD seems to have confirmed this with their next-generation graphics lineup, considering that the AMD Radeon RX 6950 XT already has a TBP of 335W, so in order to get a >2x performance increase, we can expect the Radeon RX 7900 XT to end up with a TBP closer to 400- 450W. As AMD itself has confirmed, these cards are expected to be launched later this year.
