The Hualien earthquake caused strong earthquakes to be felt throughout the island of Taiwan. The earthquakes were clearly felt in Fujian and Guangdong, and there were also earthquake feedback in Zhejiang, Jiangsu, Shanghai and other places. In addition, tsunamis have occurred in Japan’s Okinawa main island, Miyako Island and other places, and the wave height can reach about 3 meters.

Bloomberg reported that the Hualien earthquake caused the shutdown of some TSMC chip production lines, severely affecting the manufacturing of Apple’s 3nm chips.

Sources familiar with TSMC’s operations said that TSMC’s N3 wafer fab in Tainan suffered structural damage, with beams and columns broken, causing production to come to a complete halt. EUV lithography machines for processes below 7nm have also stopped operating, and the R&D laboratory There was also extensive damage, such as cracks in the walls. Another wafer fab in Hsinchu also suffered pipe ruptures and extensive damage, forcing it to suspend production.

Sources pointed out that some of TSMC’s high-end chips, such as Apple’s iPhone 15 Pro series equipped with A17 bionic chips, need to be produced in a stable vacuum environment for several weeks. Therefore, even if the earthquake does not cause direct damage, some chips that have already been put into production will be indirectly scrapped. .

Therefore, the direct impact of the Hualien earthquake on TSMC has triggered industry concerns about potential delays in the Apple product supply chain. Currently, TSMC has taken immediate action to assess the damage and initiate recovery procedures. Some production lines are expected to resume operations today, but the overall impact of the earthquake on Apple’s supply chain remains unclear.

It was previously reported that TSMC said that some factory areas have been evacuated and that all personnel are currently safe and have begun to return to work. Details are yet to be confirmed.

Bloomberg believes that Apple’s new generation 3nm chip is in the mass production stage before its release, so major disruptions in TSMC’s supply may delay the release of new products or limit supply.

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Source: TSMC

According to reports, TSMC’s Arizona factory in the United States is accelerating various projects and plans to conduct trial production of the first production line in mid-April this year, and strives to complete all preparations for mass production by the end of this year.

Reports say that if all goes well, TSMC’s U.S. factory mass production originally scheduled for the first half of 2025 may be advanced to the end of 2024.

TSMC responded on April 1 that it was advancing the Arizona fab as planned. For relevant information, please refer to the company’s official announcement.

It is learned from reports that TSMC is scheduled to hold an earnings conference call on April 18. Before the conference, positive news about new factories in the United States continues to emerge. It is expected that related topics will also become the focus of attention on the day of the conference.

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The report states that the dispatched engineers arrived in Japan in August this year, accompanied by their families; in addition, locally recruited engineers have completed training and have been deployed to the Kumamoto factory one after another to prepare for production in 2024.

According to the report, the number of expatriate employees plus locally recruited and trained employees currently exceeds 1,000 employees at TSMC’s Kumamoto plant in Japan. Officials plan to announce more during the third quarter earnings conference call.

It was previously reported that TSMC’s Japanese factory mainly produces 12/16 nm and 22/28 nm process products and currently employs 800 employees locally. The factory has started installing relevant equipment this month and, if all goes as planned, is expected to achieve mass production by the end of 2024.

TSMC’s Kumamoto factory has received strong support from the Japanese government, Sony Semiconductor Solutions, Denso and other partners. Capital expenditures for the plant total $8.6 billion, and Japan’s Ministry of Economy, Trade and Industry approved 476 billion yen ($3.5 billion) in subsidies in June, accounting for about 40% of Japan’s total subsidies.

TSMC is also interested in building a second semiconductor factory in Japan (referred to as Factory 2), and the Japanese government is considering providing subsidies of up to 900 billion yen for the second factory.

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At the same time, TSMC has seen a significant increase in customer orders, including technology giants such as Apple, MediaTek, Nvidia, AMD, Intel, Broadcom, Marvell and STMicroelectronics.

It was previously reported that AI chip customers such as AMD subsidiary Xilinx, Amazon, Cisco, Google, Microsoft, and Tesla have all accepted TSMC’s 2024 price increase plan.

Tesla, for example, is building a supercomputer facility in Austin to accelerate the development of its autonomous driving system and expand Dojo’s computing power. Dojo’s core D1 is produced using TSMC’s 7nm process and advanced packaging technology. Based on this, Tesla is deepening its cooperation with TSMC and expects order volume to increase from about 5,000 pieces this year to 10,000 pieces next year.

Nvidia is actively seeking additional production capacity amid the ongoing AI wave. On October 19, Nvidia CEO Jensen Huang revealed in an interview that global demand for AI chips remains strong.

He met with TSMC CEO Wei Zhejia to discuss matters related to increasing production capacity. Nvidia is in the planning stage of next-generation chips designed for artificial intelligence infrastructure, and is in discussions with partners such as Quanta and Asus to develop cooperation strategies.

In addition to strong artificial intelligence demand, demand for smartphones and PCs is also rebounding, Wei said during TSMC’s third-quarter earnings call. As for automotive electronics, demand is expected to be quite strong next year, benefiting from the continued growth of electric vehicles.

In response to industry concerns about smartphone growth, TSMC Chief Financial Officer Huang Renzhao pointed out that smartphone growth is still expected to be lower than the company’s future growth rate, and high-performance computing (HPC) is expected to be the strongest growth area for the next few years. make a significant contribution to growth.

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TSMC’s gross profit margin for the quarter was 54.3%, operating profit margin was 41.7%, and net profit margin was 38.6%. In the third quarter, 3nm shipments accounted for 6% of total wafer revenue; 5nm accounted for 37%; and 7nm accounted for 16%.

TSMC said capital expenditures were $7.1 billion in the third quarter, compared with $8.17 billion in the previous quarter.

TSMC’s Taipei-listed shares have fallen 27.1% in 2022, but have risen about 22% so far this year, and the chipmaker’s market value now reaches $432.3 billion.

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Semiconductor industry insiders said that many major manufacturers, including Nvidia, AMD, and MediaTek, are “willing to accept” this increase. Due to stronger-than-expected demand, Nvidia has previously placed a large order with TSMC to “expedite” the production of a full range of AI GPUs.

According to reports, as destocking comes to an end and major customers return one after another, TSMC’s operations next year are expected to resume “healthy growth” in the second quarter at the latest. The increase in foundry quotations is expected to help it offset the high costs of building and operating overseas factories. , allowing TSMC to maintain its long-term gross profit margin target of 53%.

It was previously reported that Reuters said this week that TSMC’s third-quarter net profit is expected to decline 30% year-on-year, but analysts predict that the company will achieve strong growth next year as the chip industry is emerging from the current downturn. According to data released by TSMC, revenue in the third quarter was approximately US$17 billion, a year-on-year decrease of 20%, roughly in the middle of the company’s forecast range.

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The profit decline also reflected TSMC’s strong performance in the same period last year, when the company was still driven by the release of demand after the epidemic.

According to data released by TSMC, revenue in the third quarter was approximately US$17 billion, a year-on-year decrease of 20%, roughly in the middle of the company’s forecast range.

Global demand for semiconductors began to weaken in the second half of last year, but analysts said smartphone and computer manufacturers are depleting inventories and restocking demand is expected to increase.

As such, much of the focus on Thursday will be on TSMC’s expectations for the fourth quarter and beyond.

The AI boom has also boosted shares of TSMC, whose Taipei-listed shares have soared 23% so far this year.

According to LSEG SmartEstimate, TSMC’s net profit from July to September is expected to reach NT$195.9 billion (currently about 44.469 billion RMB), and revenue growth in 2024 will reach about 22%. The LSEG SmartEstimate is a smart estimate based on the forecasts of 19 analysts, giving higher weight to analysts who are more accurate.

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Market researchers believe that even if TSMC lowers its capital expenditures this year, it will increase its research and development expenses and continue to promote the research and development of advanced processes.

Semiconductor Manufacturing Co. has rapidly ramped up capital spending, reaching a record high of $36.3 billion last year. Actual capital expenditures were $18.11 billion in the first half of the year, including $8.17 billion in the second quarter, down slightly from $9.94 billion in the first quarter.

TSMC stated at its financial report meeting in July that this year’s capital expenditures will remain between US$32 billion and US$36 billion. Taking into account market dynamics, it is expected that Actual spending for the full year will be near the lower end of that range.

The latest report shows that due to delays in Intel’s 3-nanometer outsourcing and delays in U.S. fab 4-nanometer production plans, about $4 billion originally planned for this year’s capital expenditures may be postponed to next year, resulting in reduced capital expenditures and this year’s expenditures. Less than US$30 billion. As for capital expenditures next year, they are likely to be the same as this year.

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The Japanese government will include semiconductor support measures, including TSMC’s new factory, in its economic policy as soon as October. Japan’s Ministry of Economy, Trade and Industry has included a total of 3.355 trillion yen in the 2023 supplementary budget and will increase the “post-5G fund” and “cutting-edge semiconductor fund” to support semiconductors. The final amount will then be determined in consultation with the Japanese Ministry of Finance.

According to reports, currently, Japan can only independently produce semiconductors at the 40nm level, and the addition of TSMC will undoubtedly greatly improve the level of manufacturing processes. TSMC will start building its first semiconductor factory in Kumamoto in April 2022. The total investment is expected to be about 1.2 trillion yen and it will mass-produce 12-28nm semiconductors.

The second factory to produce cutting-edge products is expected to start construction before the summer of 2024 and start mass production in 2027. It strives to produce about 60,000 units per month. It is expected to mass-produce 6nm and 12nm computing logic semiconductors and plans to sell them to Sony Group and others. The new second factory will exceed the first factory in terms of investment scale and product performance.

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Although there are no formal specifications for HBM4 yet, TSMC gave some developing standards at the 2023 OIP Forum Amsterdam factory. TSMC said that the interface bit width of HBM4 memory will be doubled to 2048 bit in the future.

It is worth mentioning that for various technical reasons, they also hope to achieve this goal without increasing the space occupied by the HBM memory stack. This will also double the interconnect density of the next-generation HBM memory without requiring Increased clock speed.

According to the plan, this will enable HBM4 to achieve a major leap forward on multiple technical levels.

In terms of DRAM stacking, a 2048-bit memory interface requires a significant increase in the number of through silicon vias. At the same time, the external chip interface will need to reduce the bump pitch to less than 55 microns and significantly increase the number of micro-bumps (Note: HBM3 currently has approximately 3982 micro-bumps).

In addition, HBM4 will also adopt a 16-Hi stacking mode, which means stacking 16 memory chips in one module, which will further increase its technical complexity (HBM3 also technically supports 16-Hi stacking, but No manufacturer has actually done this so far).

All of these new metrics, in turn, require a closer collaborative approach between chipmakers, memory makers and chip packaging companies to ensure everything runs smoothly.

At TSMC’s TSMC OIP 2023 conference in Amsterdam, Dan Kochpatcharin, head of design infrastructure management at TSMC, said: “Because instead of doubling the speed, they’re changing the [interface] pins [with HBM4 together]. That’s why we’re working hard to make sure that we work with all three partners to qualify their HBM4 [that can be passed through our advanced packaging] and make sure that the RDL or the mediator or anything in between The layout and speed of HBM4 can be supported. So, we are working with Samsung, SK Hynix and Micron.”

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