According to Samsung’s official news, HBM memory for high-performance computing (HPC) has ushered in new progress. The 9.8Gbps HBM3E product has begun to provide samples to customers, and HBM4 memory is expected to be launched in 2025.
Although there are no formal specifications for HBM4 yet, TSMC gave some developing standards at the 2023 OIP Forum Amsterdam factory. TSMC said that the interface bit width of HBM4 memory will be doubled to 2048 bit in the future.
It is worth mentioning that for various technical reasons, they also hope to achieve this goal without increasing the space occupied by the HBM memory stack. This will also double the interconnect density of the next-generation HBM memory without requiring Increased clock speed.
According to the plan, this will enable HBM4 to achieve a major leap forward on multiple technical levels.
In terms of DRAM stacking, a 2048-bit memory interface requires a significant increase in the number of through silicon vias. At the same time, the external chip interface will need to reduce the bump pitch to less than 55 microns and significantly increase the number of micro-bumps (Note: HBM3 currently has approximately 3982 micro-bumps).
In addition, HBM4 will also adopt a 16-Hi stacking mode, which means stacking 16 memory chips in one module, which will further increase its technical complexity (HBM3 also technically supports 16-Hi stacking, but No manufacturer has actually done this so far).
All of these new metrics, in turn, require a closer collaborative approach between chipmakers, memory makers and chip packaging companies to ensure everything runs smoothly.
At TSMC’s TSMC OIP 2023 conference in Amsterdam, Dan Kochpatcharin, head of design infrastructure management at TSMC, said: “Because instead of doubling the speed, they’re changing the [interface] pins [with HBM4 together]. That’s why we’re working hard to make sure that we work with all three partners to qualify their HBM4 [that can be passed through our advanced packaging] and make sure that the RDL or the mediator or anything in between The layout and speed of HBM4 can be supported. So, we are working with Samsung, SK Hynix and Micron.”
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