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SK hynix showcases PLC NAND with dual 2.5 bit units

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Samsung Electronics plans to produce the 9th generation of V-NAND flash memory next year, which will continue to use a double-layer stack architecture with more than 300 layers; layer NAND flash memory.

In fact, in addition to increasing the number of layers, the means to increase storage density also include other solutions. At present, 4bit cell (QLC) type 3D NAND flash memory has been commercialized, and SSD has benefited from this and has become a “cabbage price”.

Although SSDs are showing signs of rising prices, several major manufacturers have begun to develop the next-generation 5-bit unit (PLC) solution, and I believe everyone will be able to use solid-state drives with larger capacity and faster speeds.

At the FMS 2023 Flash Memory Summit, SK Hynix demonstrated the results of its research on new PLC (5-Bit MLC) technology.

The principle of this technology is similar to the Twin BiCS FLASH technology developed by Kioxia in 2019. Simply put, it uses two 2.5 bit units, so that if two threads write at the same time, it will definitely be much faster than 5 bit storage.

In a 5 bit unit, a storage unit can contain 32 different threshold voltages (Note: 25), and the time required to write and verify 32 different threshold voltages with PLC in the conventional way is TLC. Nearly 20 times, which is obviously unacceptable to users.

Therefore, SK Hynix designed a new type of PLC that divides a 5bit unit into two 2.5 bit points, and each point also stores 2.5 bits. Then the data of each point is integrated to obtain 5 bit data, so that the writing time of PLC can be roughly the same as that of TLC (3bit unit).

In fact, Solidigm has demonstrated the first SSD using PLC-NAND a year ago, which uses the same 192-layer flash memory as the current QLC-NAND, but since each unit is composed of 5 bits (instead of 4 bits), its density increased to 23.3 Gbit/mm², setting a record high; and with the new 9th generation TLC-NAND with 321 layers, SK hynix is expected to reach a density of more than 20 Gbit/mm². Of course, more layers also mean more work steps and higher costs, and early products are expected to remain expensive.

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