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Intel patent confirms L4 quad-level cache for Meteor Lake processors

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Intel is preparing its 14th generation of processors, some of which will feature the Meteor Lake architecture and the Foveros package for mobile models. A previous Linux patch hinted that Meteor Lake will support L4 quad cache.

According to Intel’s December 2020 patent, the company’s “next-generation SoC architecture”, also known as Meteor Lake, will feature “packaged caching”. In other words, the Adamantine cache (L4 cache, or ADM) will be part of the base block and can be accessed by any building block of the next-generation SoC.

The patent shows that Meteor Lake will have a completely hybrid architecture, combining five different blocks: CPU, SoC, GPU, I/O and base block. The newly introduced Adamantine cache will provide faster access speeds than any typical cache such as the L3 cache within a CPU tile.

Intel explains in the patent that the main purpose of the L4 cache is to improve boot optimization and increase security around the host CPU. In addition, the L4 cache will retain the cache on reset, thus reducing load times that would otherwise have to go through all boot/reset cycles.

According to Moore’s Law is Dead news, Intel Meteor Lake’s ADM cache can scale up to the “GB” level, but is currently tested at 128MB to 512MB.

Intel’s Meteor Lake processors are expected to be available in the second half of 2023.

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