Texas Instruments (TI) recently introduced a scalable family of Arm Cortex-M0+ microcontrollers (MCUs) with a variety of computing, pinouts, memory and integrated analog options.
According to the introduction, designers can choose from a variety of compute options from 32MHz to 80MHz with multiple configurations of math acceleration and integrated analog signal chain components, including MCU on-chip zero-drift operational amplifiers and 12-bit, 4MSPS precision analog-to-digital converters.
The Arm Cortex-M0+ improves CPU performance from the Cortex-M0 (2.33 CoreMark/MHz to 2.46 CoreMark/MHz) and also integrates a memory protection unit (MPU), single-cycle I/O interface and microtracking cache (MTB) with the following key features.
- Armv6-M architecture
- AHB-lite bus interface, von Neumann bus architecture with optional single-cycle I/O interface
- Thumb / Thumb-2 subset instruction support
- 2 segment pipeline
- Optional 8-area MPU with subareas and background areas
- Non-maskable interrupts + 1 to 32 physical interrupts
- Wake-up interrupt controller
- Hardware single-cycle (32×32) multiplication
- Multiple sleep modes with integrated wait-for-interrupt (WFI), wait-for-event (WFE) and sleep-on-exit functions, sleep and deep sleep signals
- Multiple retention modes depending on implementation
- JTAG and serial line debug ports with up to 4 breakpoints and 2 watchpoints
- Optional microtrace cache
The release of dozens of Texas Instruments MCUs, supported by intuitive software and design tools, enables the MSPM0 MCU product family to help designers spend more time innovating, reduce evaluation and programming time, and cut design time from months to days, said Texas Instruments.
MSPM0L and MSPM0G MCUs are available through TI.com.co.uk and authorized distributors. These MCUs are available in a variety of package sizes, including 16- to 32-pin package options and 8 kB to 128 kB flash memory options.
