Source Kyle Bennett has previously stated that the RX 7000 graphics card will be the first to support the DP 2.1 protocol. His latest news said that neither the RX 7000 public version of the graphics card nor the non-public version will use the 16pin power supply interface (12VHPWR).

According to Angstronomics, AMD’s new Navi 3X GPU-based graphics cards will still use dual 8pin power connectors.

AMD has now announced that it will hold the RX 7000 series graphics card conference at 4:00 p.m. Eastern Time on November 3. The official gave a warm-up picture of the RX 7000 public version graphics card, but the picture does not reveal its power supply interface.

The RX 7000 series reference graphics card design maintains a black color scheme with a three-fan design, similar to the RX 6950XT. Compared with the existing RDNA2 GPU, the next-generation GPU will have the following highlights:

5nm process node

Advanced Chiplet Packaging

New Architecture Compute Unit

Optimized graphics pipeline

Next-Generation AMD Infinite Cache

50% improvement in performance per watt compared to RDNA 2

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Of course, since the current upstream production capacity can be matched, players don’t have to worry too much, and it is also positioned as a high-end product.

It is reported that the RX 7900 series uses Navi 31 GPU and up to 12288 stream processors. This is AMD’s first consumer-grade chiplet designed for the Radeon family, featuring large graphics and memory chips on a single package.

The rumored RX 7900XT will be equipped with 20GB GDDR6 memory and a 320-bit bus, while the RX 7950XT will be equipped with 24GB of GDDR6 memory and a full 384-bit memory bus, so there is no need to worry about performance.

Plus, there’s news that AMD is going to make a huge leap in laptop GPU performance with their next-generation Radeon RX 7000 “RDNA 3” chip, the Radeon RX 7900M is said to be on par with the NVIDIA GeForce RTX 3090, which is going to be a huge leap.

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According to the authoritative exposer @Greymon55, the GCD portion of the Navi 31 core is a little over 350 square millimeters.

This is a full 33% smaller than the 520 square millimeters of the Navi 21 core used in the RX 6900/6800 series, but the latter is a separate core, so it lacks direct comparability.

The area of the Navi 13 MCD section is not known at this time, but six of them would add up to a significant area, and the total area would almost certainly be larger than the Navi 21, or it would not be a separate design.

Assuming 40 square millimeters per MCD, the total area will be 590 square millimeters, almost the same as the NVIDIA AD102 core, which is rumored to be around 600 square millimeters.

Non-equal scale comparison

However, it is worth mentioning that Navi 31 core will eliminate some non-essential and obsolete modules, such as XGMI bus for multi-card parallel connection, GDS (Global Data Sharing), geometry pipeline, scan converter, etc., which can also save a lot of transistors and area.

Also, the Navi 32 core will be a similar small-chip design, with MCDs expected to be reduced to four, and Navi 33 will continue to be a single chip.

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