2DPC memory configuration refers to the installation of 2 dual in-line memory modules (DIMMs) per channel, with a total of 4 DIMMs installed. The 1DPC memory configuration refers to the installation of 1 dual in-line memory module (DIMM) per channel, and one channel corresponds to one memory slot.

AMD has already released a BIOS update to OEMs with promised support for 2DPC configurations planned for late Q1 2023. AMD said it is further adjusting the memory configuration of 2DPC to provide full support through updates.

AMD’s recently launched EPYC Genoa processor is equipped with several new interfaces and supports 12-channel DDR5 memory. However, the media found in the early evaluation that Genoa only supports DDR5 memory under 1DPC memory configuration.

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AMD confirmed in its recent Q4 2022 earnings call that it plans to launch four new data center products in 2023, including Genoa-X, Bergamo, Siena and Instinct MI300.

It is reported that AMD EPYC Bergamo CPU will be launched in the first half of 2023, followed by Instinct MI300 APU in the second half of 2023.

The main difference is that Genoa is optimized for higher frequency workloads, while Bergamo is optimized for higher throughput workloads.

The AMD Instinct MI300 is a multi-chip and multi-IP Instinct gas pedal that will power the 2+ Exaflops El Capitan supercomputer with not only a CDNA 3 GPU core, but also a next-generation Zen 4 CPU core.

The latest specs for the AMD Instinct MI300 show that this APU is a “monster of a small-chip design” that will include multiple 5nm-based 3D small-chip packages with a total of 146 billion transistors, a total of 24 datacenter-oriented Zen 4 CPU cores and 128 GB of HBM3 memory with an 8192-bit bus bit width in addition to the CDNA 3 architecture GPU.

The post AMD to launch EPYC Bergamo CPUs in the first half of the year and Instinct MI300 APUs in the second half appeared first on TechGoing.