The race to release first and second-generation 3nm processing chips is on as Samsung Foundry has begun production. The entire process will make use of the Gate-All-Around (GAA) transistor architecture. This production process will be the first to use the Multi-Bridge-Channel FET for performance improvement.
Such improvements this new process will bring will affect the overall power efficiency and performance. President and Head of Samsung Foundry business, Dr Siyoung Choi, is optimistic about this project. According to him, Samsung will maintain its leadership in the semiconductor manufacturing business.
In comparison with the available 5nm chips, the new 3nm process will offer some real upgrades. These upgrades include a 23% improvement in performance and a 45% power consumption reduction. It also reduces the surface area of chips by up to 16%. Well, these records speak for the first-generation 3nm fabrication process.
The second-generation 3nm process takes these upgrades even further in comparison with the 5nm process. Power consumption goes down by 50%, performance goes up 30%, and surface area reduces by 35%. Both first and second-generation 3nm processes will shrink the transistor while maintaining a good flow of current.
Mass production of the 3nm fabrication process from Samsung Foundry is already in motion. This puts Samsung ahead of TSMC in the 3nm tussle. By next year, we will begin to see processor chips use the 3nm process with performance upgrades.
