With the increasing number of model training tasks, the importance of memory such as HBM and DDR5 in high-performance computing is increasing, and the power consumption of memory is also becoming more prominent.
According to foreign media Chosun Biz, memory manufacturers such as Samsung Electronics and SK Hynix are collaborating with academia to invest in next-generation technologies to reduce power consumption and improve efficiency under high-performance computing.
After inquiry, it is learned that DRAM currently accounts for 40% of the total power consumption of the Nvidia A100-based data center platform, and as the number of layers increases, the power consumption of HBM will also increase.
Seoul National University previously launched DRAM Translation Layer technology, claiming that it can reduce DRAM power consumption by 31.6%, which has attracted Samsung’s interest.
▲ Image source Seoul National University paper
▲ Image source Seoul National University paper
Samsung is currently working with Seoul National University to further reduce memory power consumption. Based on Compute Express Link technology, they have developed a 16GB DDR5 DRAM using a 12nm process, which reduces power consumption by 23% compared to the previous generation.
▲ Source Compute Express Link website
SK Hynix launched LPDDR5X, which applies the High-K Metal Gate (HKMG) process to mobile DRAM. The High-K material has a dielectric constant about five times higher than conventional SiON insulating films, can store five times more charge in the same area and thickness, and helps reduce current leakage. By controlling leakage current, SK Hynix’s LPDDR5X is 33% faster and consumes more than 20% less power than the previous generation.
▲ Picture source Pexels
As the model training task puts forward further technical update requirements for memory manufacturers, manufacturers are now competing with each other, resulting in a certain reduction in memory costs, and consumers can also benefit from it.
