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Open Source Euler RISC-V 23.03 Innovative Release: Comprehensive Hardware Compatibility

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Open Source Euler RISC-V 23.03 Innovative Release: Comprehensive Hardware Compatibility

OpenEuler RISC-V 23.03 innovative version was officially released recently. The openEuler RISC-V SIG, as the maintenance organization of the openEuler system on the RISC-V architecture, is mainly committed to the adaptation of openEuler in RISC-V software and hardware and has been providing the RISC-V mirror version of openEuler following the rhythm of the openEuler version. This update brings better hardware support and more software adaptations, including default support for VisionFive 2, SG2042 and other new development boards, new adaptations for multiple desktop environments such as UKUI and GNOME, containers and their Adaptation of tools. In addition, JIT support and targeted optimization are added by default.


Hardware Support

In terms of hardware, openEuler RISC-V 23.03 has inherited and updated Quanzhi Nezha D1, Sisu Lichee RV, SiFive Unmatched, Saifang VisionFive 1 and other development boards, and also updated and supported Saifang VisionFive 2 and computing power SG2042 Two devices.

Support SG2042

The innovative version of openEuler RISC-V 23.03 is successfully connected to the RISC-V 64 cores high-performance processor SG2042 (EVB) server board, which is an important step in the ecological development of the RISC-V server field. After testing, the basic system, wired network, USB interface and other components can be used smoothly. Compared with the qemu user mode, the local construction method of SG2042 has a significant speed advantage, which greatly shortens the construction time for this release of openEuler RISC-V 23.03. The RISC-V SIG plans to combine SG2042 with the OBS build system to improve the efficiency of building openEuler RISC-V software packages.

Update VisionFive 2

openEuler RISC-V 23.03 has made major repairs to the VisionFive 2 development board. On the basis of the previous test image, the graphical interface, HDMI output and other parts have been repaired. The available functions have been matched with other development boards, and the overall operation is relatively smooth.


Software Support

Kernel Upgrade

openEuler 23.03 uses the Linux Kernel 6.1 kernel, and uses the 6.x kernel for the future openEuler long-life cycle version to conduct technical exploration in advance. RISC-V SIG followed up this important update and provided the 6.1 kernel adaptation for the openEuler RISC-V environment. It is convenient for RISC-V developers to use the latest kernel development.

Support for multiple desktop environments

In terms of desktops, the innovative version of openEuler RISC-V 23.03 supports XFCE, UKUI, DDE, Kiran, GNOME, and Cinnamon desktop environments, providing users with an excellent desktop user experience. RISC-V SIG has also optimized some desktop components such as GNOME’s gjs.

Adapt to iSulad container

The RISC-V SIG has added RISC-V support to iSulad and successfully tested the availability of the iSulad container engine in the openEuler RISC-V 23.03 innovation release. iSulad is a container engine project under the Open Atom Open Source Foundation, initiated by Huawei Poincaré Laboratory, and open sourced in the openEuler community in 2019.

Compared with Docker, iSulad Universal Container Engine is a new container solution that provides a unified architecture design to meet the different needs of CT and IT fields. It is implemented in C/C++ and is characterized by lightness, flexibility, ingenuity, and speed. It is not limited by hardware specifications and architecture and has a lower noise floor overhead and a wider range of applications.

Experimental JIT support

In the innovative version of openEuler RISC-V 23.03, RISC-V SIG added targeted JIT optimization and testing, related work involved Mesa, GNOME desktop optimization and LuaJIT related software.

Currently, the RISCV SIG has upgraded Mesa to version 23.0.0, and introduced a new JIT engine based on LLVMpipe that supports RISC-V optimization. At the same time, the glxgears test was run in the RISC-V environment, confirming that the performance has been significantly improved. The developers are adding Cache optimization based on the patch, and we will continue to follow up on the follow-up progress.

On the desktop side, the RISC-V SIG has backported the SpiderMonkey RISC-V JIT patch on mozjs102, which significantly improves the performance of gjs and further optimizes the GNOME desktop experience.

Based on the experimental addition of LuaJIT support, the RISC-V SIG has successfully built a series of LuaJIT-dependent packages for the RISC-V architecture, including openResty and Minetest, and related support is still under development.