Intel has announced that it will officially release the fifth-generation scalable Xeon Emerald Rapids on December 14, the same day as Core Ultra. Although it is only an upgraded version of the fourth generation Sapphire Rapids Xeon, which is not as big a change as next year’s Intel 3 process Granite Rapids and Sierra Forest (the latter has 288 small cores), there are still many upgrade highlights.
YuuKi_AnS released a screenshot of the software identification of the high-end model Xeon Platinum 8580, which is confirmed to be dual-chip integration, 60 cores and 120 threads, the second-level cache is 2MB per core, a total of 120MB, and the third-level cache is up to 300MB, a total of 420MB, 2.6 more than now times.
More importantly, there is a 64-core flagship, the third-level cache is increased to 320MB, plus the 128MB second-level cache, the total is 448MB, a full three times more than now.
Of course, AMD EPYC is even more powerful. The 96-core flagship EPYC 9654 has 96MB L2 cache and 384MB L3 cache, totaling 480MB. The EPYC 9684X with 3D cache also stacks another 768MB, totaling 1248MB.
If AMD Zen5 can double the L2 cache to 2MB per core, the total cache capacity will increase by leaps and bounds.
Leaked news shows that the fifth-generation Xeon will also increase the frequency supported by DDR5 memory, optimize the power mode, and integrate the Intel accelerator engine to improve energy efficiency. The overall energy efficiency improvement can reach 17%.
