Recently, the CXL Consortium has released version 3.0 of its Compute eXpress Link (CXL) specification to double the bandwidth of data center memory systems with industry-wide support, according to an external media report.
Using the latest version of PCI Express PCIe 6.0, CXL 3.0 doubles the data rate to 64GT/s with no increase in latency over CXL 2.0 and adds point-to-point memory interconnects. Verification IP is available from Avery Design Systems, while Synopsys and Cadence Design Systems have controller IP that supports the new specification. dedicated AI gas pedal chips.
ARM, Intel, Marvell, Rambus and Samsung Electronics are also supporting the technology, as are memory manufacturers SK hynix and Micron and test equipment manufacturer Teledyne LeCroy.
CXL is an open interconnect protocol that enables high-speed and efficient interconnections between CPUs and GPUs, FPGAs or other gas pedals to meet the requirements of today’s high-performance heterogeneous computing, and provides higher bandwidth and better memory consistency.
The CXL 3.0 specification introduces fabric functionality and management, improved memory pooling, enhanced consistency, and peer-to-peer communication; doubles data transfer rates to 64 GT/s with no increase in latency over CXL 2.0; and is backward compatible with CXL 2.0, CXL 1.1, and CXL 1.0 versions of the specification.
“The new features of the CXL 3.0 specification address data-intensive workloads in high-performance computing applications that require higher bandwidth, scalability and security. As an active contributor to the CXL Alliance, Synopsys has enabled leading customers to integrate standards-compliant Synopsys CXL 3.0 PHYs, controllers, IDE security modules and verification IP to help them get an early start on their advanced silicon designs,” said John Koeter, senior vice president of marketing and strategy for Synopsys’ Solutions Group. Koeter said.
“Modern data centers require heterogeneous and composable architectures to support compute-intensive workloads for applications such as artificial intelligence and machine learning — and we continue to evolve CXL technology to meet industry needs,” said Siamak said Tavallaei. “Developed by members of our dedicated technical working group, the CXL 3.0 specification will enable new usage models in composable decomposition infrastructures.”