CoreTech, the self-proclaimed leader in one-stop IP and custom chips in China, announced that it has officially joined the UCIe industry alliance to promote Chiplet (small chip/chiplet) standardization. Meanwhile, Innolink Chiplet solution, the first set of self-developed cross-process and cross-package physical layer compatible with UCIe international standard, has been the first in the world to be compatible with various application scenarios and has been successfully commercially implemented.
In March this year, Intel, TSMC, Samsung, Sunrise, AMD, ARM, Qualcomm, Google, Microsoft, Meta (Facebook) and other industry giants joined forces to create a new universal chip interconnection standard – UCle.
CoreTech then announced that it has taken the lead in launching a domestic self-developed IP solution “Innolink Chiplet” that is compatible with the UCIe international standard at the physical layer, which is the first cross-process and cross-package Chiplet connectivity solution in China, and has been successfully verified in mass production on advanced processes.
According to the introduction of Chiplet architect of CoreTech, CoreTech has accumulated a lot of experience in the field of Chiplet technology for customer applications, and has close technical communication and cooperation with TSMC, Intel, Samsung, Micron and other industry leaders to explore. B/C DDR-based technology route, and the first time to disclose Innolink A/B/C technology to the industry at the Design Reuse global conference in 2020.
Thanks to the correct technical direction and advanced layout planning, Innolink’s physical layer is consistent with the UCIe standard, and it has become the first domestic and world advanced independent UCIe Chiplet solution.
Coretronic adopts DDR implementation in Innolink-B/C solution, providing high speed, high density and high bandwidth connection solution based on GDDR6/LPDDR5 technology.
The standard package uses MCM traditional substrate or short pitch PCB as the medium for Chiplet interconnection, which has the characteristics of cheap cost and easy integration, while with advanced packages such as Silicon Interposer, which has the characteristics of high density, low power consumption and high cost.
Currently, Innolink Chiplet solution is not only used in Fenghua 1 data center GPU to double the performance, but also licensed to many partners and customers.
By reusing CorePower’s homegrown Innolink Chiplet technology, chip design companies and system vendors are able to quickly and easily interconnect multi-Die and multi-chip, effectively simplifying the design process.
Currently, Innolink has mastered GDDR6/6X, LPDDR5/5X, DDR5/4, HBM3/HBM2E, 32G/56G SerDes, substrate and Interposer design solutions, high speed signal integrity analysis, advanced process packaging, test methods and other world leading core technologies, and after a large number of customer demand landing and mass production We have accumulated more than 200 times of verification experience and shipped more than 6 billion units of high-end IP for mass production applications.
Especially in DDR series high-bandwidth technology, CoreTech has mass-produced the world’s fastest LPDDR5/5X/DDR5 IP one-stop solution with advanced FinFet process, achieving memory particles over 10Gbps access rate for the first time on common PCB long distance.
